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datasheet 1 rev. 1.0 www.infineon.com/hitfet 2016-06-01 hitfet - BTS3125TF smart low-side power switch 1 overview basic features ? single channel device ? very low output leakage current in off state ? electrostatic discharge protection (esd) ? embedded protection functions (see below) ? green product (rohs compliant) ? aec qualified applications ? suitable for resistive, induc tive and capacitive loads ? replaces electromechanical rela ys, fuses and discrete circuits description the BTS3125TF is a 125 m ? single channel smart low-side powe r switch within a pg-to252-3 package providing embedded protective functi ons. the power transistor is buil t by an n-channel vertical power mosfet. the device is monolithically inte grated. the BTS3125TF is automotive qualified and is optimized for 12 v automotive applications. type package marking BTS3125TF pg-to252-3 s3125tf table 1 product summary operating voltage range v out 0 .. 31 v maximum load voltage v bat(ld) 40 v maximum input voltage v in 5.5 v maximum on-state resistance at t j = 150c, v in = 5 v r ds(on) 250 m ? nominal load current i l(nom) 2a minimum current limitation i l(lim) 7a maximum off state load current at t j 85c i l(off)_85 0.6 a
datasheet 2 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch overview protection functions ? over temperature shut-down with automatic-restart ? active clamp over voltage protection ?current limitation detailed description the device is able to switch all kind of resistive, in ductive and capacitive loads, limited by maximum clamping energy and maximum current capabilities. the BTS3125TF offers esd protection on the in pin which refers to th e source pin (ground). the over temperature protection prevents the device from overheating due to overload and/or bad cooling conditions. the temperature information is given by a temperature sensor in the power mosfet. the BTS3125TF has an auto-restart ther mal shut-down function. th e device will turn on again, if input is still high, after the measured temperature has dropped below the thermal hysteresis. the over voltage protection can be activated during load dump or indu ctive turn off conditions. the power mosfet is limiting the drain-source voltage, if it rises above the v out(clamp).
datasheet 3 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 pin assignment BTS3125TF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.3 voltage and current definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.3 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.3.1 pcb set up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.3.2 transient thermal impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.1 output on-state resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.2 resistive load output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.3 inductive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.3.1 output clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.3.1.1 maximum load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.4 reverse current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.5 inverse current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.6 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.1 over voltage clamping on output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.2 thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.3 short circuit protection / current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.4 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 input stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.1 input circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.2 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.1 power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8.2 protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8.3 input stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 characterization results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9.1 power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9.2 protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 9.3 input stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 10 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 10.1 application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 11 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 12 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table of contents
datasheet 4 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch block diagram 2 block diagram figure 1 block diagram out gnd in over voltage protection gate driving unit over- temperature protection short circuit detection / current limitation blockdiagr am_3 pin.emf esd protection
datasheet 5 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch pin configuration 3 pin configuration 3.1 pin assignment BTS3125TF figure 2 pin configuration. pg-to252-3 3.2 pin definitions and functions 3.3 voltage and current definition figure 3 shows all external terms used in this data sheet, with associated convention for positive values. figure 3 naming definition of electrical parameters pin symbol function 1in input pin 2,4 out drain, load connection for power dmos 3 gnd ground, source of power dmos (top view ) 4 (tab) 13 2 v bat gnd in v bat v in i in gnd i gnd z l i l ,i d v out out
datasheet 6 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch general product characteristics 4 general product characteristics 4.1 absolute maximum ratings table 2 absolute maximum ratings 1) t j = -40c to +150c; all voltages with respect to ground , positive current flowing into pin (unless otherwise specified) parameter symbol values unit not e or test condition number min. typ. max. voltages output voltage v out ? ? 40 v internally clamped p_4.1.1 battery voltage for short circuit protection v bat(sc) ??31v l = 0 or 5 m r sc = 20 m ? + r cable r cable = l * 16 m ? /m l sc = 5 h + l cable l cable = l * 1 h/m v in = 5 v p_4.1.2 battery voltage for load dump protection v bat(ld) ??40v 2) r i = 2 ? r l = 4.5 ? t d = 400 ms suppressed pulse p_4.1.4 input pin input voltage v in -0.3 ? 5.5 v - p_4.1.7 input current in inverse condition on out to gnd i in ??2ma 3) v out < -0.3 v p_4.1.10 power stage load current | i l |?? i l(lim) a - p_4.1.11 energies unclamped single inductive energy single pulse e as ??24mj i l(0) = i l(nom) v bat = 13.5 v t j(0) = 150c p_4.1.16 unclamped repetitive inductive energy pulse with 10 k cycles e ar(10k) ??24mj i l(0) = i l(nom) v bat = 13.5 v t j(0) = 105c p_4.1.24 unclamped repetitive inductive energy pulse with 100 k cycles e ar(100k) ??19mj i l(0) = i l(nom) v bat = 13.5 v t j(0) = 105c p_4.1.28 unclamped repetitive inductive energy pulse with 1 m cycles e ar(1m) ??15mj i l(0) = i l(nom) v bat = 13.5 v t j(0) = 105c p_4.1.32
datasheet 7 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch general product characteristics notes 1. stresses above the ones listed he re may cause permanent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. integrated protection functions are designed to preven t ic destruction under fault conditions described in the data sheet. fault conditions are cons idered as ?outside? normal operatin g range. protection functions are not designed for continuous repetitive operation. 4.2 functional range temperatures operating temperature t j -40 ? +150 c ? p_4.1.37 storage temperature t stg -55 ? +150 c ? p_4.1.38 esd susceptibility esd susceptibility (all pins) v esd -4 ? 4 kv hbm 4) p_4.1.39 esd susceptibility out-pin to gnd v esd -10 ? 10 kv hbm 4) p_4.1.40 esd susceptibility v esd -2 ? 2 kv cdm 5) p_4.1.41 1) not subject to production test, specified by design. 2) v bat(ld) is setup without the dut connected to the generator per iso 7637-1; r i is the internal resistance of th e load dump test pulse generator; t d is the pulse duration time for load dump pulse (pulse 5) according iso 7637-1, -2. 3) maximum allowed value. consider also inverse inpu t current in inverse condit ion p_8.3.7 in chapter 8 4) esd susceptibility, hbm accordin g to ansi/esda/jedec js001 (1.5 k ? , 100 pf) 5) esd susceptibility, charged device model ?cdm? esda stm5.3.1 or ansi/esd s.5.3.1 table 3 functional range 1) please refer to ?electrical characteristics? on page 18 for test conditions parameter symbol values unit note or test condition number min. typ. max. battery voltage range for nominal operation v bat(nor) 6.0 ? 18.0 v ? p_4.2.1 extended battery voltage range for operation v bat(ext) 0 ? 31 v parameter deviations possible p_4.2.2 input voltage range for nominal operation v in(nor) 3.0 ? 5.5 v ? p_4.2.3 junction temperature t j -40 ? 150 c ? p_4.2.5 table 2 absolute maximum ratings 1) (cont?d) t j = -40c to +150c; all voltages with respect to ground , positive current flowing into pin (unless otherwise specified) parameter symbol values unit not e or test condition number min. typ. max.
datasheet 8 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch general product characteristics note: within the functional range the ic operates as described in the circuit de scription. the electrical characteristics are specified within the conditions given in the related electrical characteristics table. 4.3 thermal resistance note: this thermal data was generated in accordance with jedec jesd51 standards. for more information, go to www.jedec.org . 4.3.1 pcb set up the following pcb set up was implemented to determine the transient thermal impedance 1) figure 4 cross section jedec2s2p 1) not subject to production test, specified by design table 4 thermal resistance pg-to252-3 parameter symbol values unit note or test condition number min. typ. max. junction to soldering point r thjsp ?5.1?k/w 1) 2) 1) not subject to production test, specified by design 2) specified r thjsp value is simulated at natural convection on a cold plate setup (all pins are fixed to ambient temperature). t a = 85c. device is loaded with 1 w power. p_4.3.4 junction to ambient (2s2p) r thja(2s2p) ?28?k/w 1) 3) 3) specified r thja value is according to jedec jesd51-2,-5,-7 at natural convection on fr4 2s2p board; the product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 m cu, 2 x 35 m cu). where applicable a thermal via array under the ex posed pad contacted the first inner copper layer. t a = 85c, device is loaded with 1 w power. p_4.3.8 junction to ambient (1s0p+600 mm 2 cu) r thja(1s0p) ?42?k/w 1) 4) 4) specified r thja value is according to jedec jesd51-2,-5,-7 at natural convection on fr4 1s0p board; the product (chip+package) was simulated on a 76.2 x 114. 3 x 1.5 mm board with additi onal heatspreading copper area of 600 mm 2 and 70 m thickness. t a = 85c, device is loaded with 1 w power. p_4.3.12 1) (*) means percentual cu me talization on each layer ? 70m modelled (traces) 35m, 100% metalization* 1 , 5 mm 70m, 5% metalization*
datasheet 9 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch general product characteristics figure 5 cross section jedec1s0p figure 6 pcb layout 4.3.2 transient thermal impedance 70m modelled (traces, cooling area) 1 , 5 mm 70m; 5% metalization* jedec 1s0p / 600mm2 jedec 1s0p / footprint jedec 2s2p detail:solder pads vias
datasheet 10 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch general product characteristics figure 7 typical transient thermal impedance z thja = f( t p ), t a = 85c value is according to jedec jesd51-2,-7 at natural convection on fr4 2s2p board; the product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (2 x 70 m cu, 2 x 35 m cu). device is dissipating 1 w power. figure 8 typical transient thermal impedance z thja = f( t p ), ta = 85c value is according to jedec jesd51-3 at natura l convection on fr4 1s0p board. device is dissipating 1 w power. 0 5 10 15 20 25 30 0,000001 0,00001 0,0001 0,001 0,01 0,1 1 10 100 1000 10000 z thja [k/w] t p . [s] 0 20 40 60 80 100 120 0,000001 0,00001 0,0001 0,001 0,01 0,1 1 10 100 1000 10000 z thja [k/w] t p . [s] jedec 1s0p / 600mm2 jedec 1s0p / 300mm2 jedec 1s0p / footprint
datasheet 11 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch power stage 5 power stage 5.1 output on-state resistance the on-state resistance depends on the junction temperature t j and on the applied input voltage. figure 9 show this dependencies in terms of temperature and voltage for the typical on-state resistance r ds(on) . the behavior in reverse polarity is described in ?reverse current capability? on page 13 figure 9 typical on -state resistance, r ds(on) = f( t j ), v in = 3 v; v in = 5 v 5.2 resistive load output timing figure 10 shows the typical timing when switching a resistive load. figure 10 definition of power output timing for resistive load 0 40 80 120 160 200 240 280 320 -40 -20 0 20 40 60 80 100 120 140 r ds(on) [m ] t j [c] 3v 5v t v out v bat switching.e t 10 % 90 % t on t don t off t doff v in v in(th) 50 % -( v/ t) on ( v/ t) off t f t r
datasheet 12 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch power stage 5.3 inductive load 5.3.1 output clamping when switching off inductive loads with low side switches , the drain-source voltage v out rises above battery potential, because the inductance intends to continue dr iving the current. to prev ent unwanted high voltages the device has a voltage clamping mechanism to keep the voltage at v out(clamp) . during this clamping operation mode the device heats up as it dissipates the energy from the induct ance. therefore the maximum allowed load inductance is limited. see figure 11 and figure 12 for more details. figure 11 output clamp circuitry figure 12 switching an inductive load gnd ( dmos source ) out ( dmos drain i gnd v bat z l i l v out t t v out v bat id i o cl f t i out v out(clamp ) v in
datasheet 13 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch power stage 5.3.1.1 maximum load inductance while demagnetization of inductive loads, energy has to be dissipated by the BTS3125TF. this energy can be calculated by the following equation: (5.1) following equation simplifies under the assumption of r l = 0 (5.2) for maximum single avalanche energy please also refer to eas value in ?energies? on page 6 . figure 13 maximum load inductance for single pulse l = f ( i l ), t j(0) = t j, start = 150c, v bat = 13.5 v 5.4 reverse current capability a reverse battery situation means the out pin is pulled below gnd potentials to - v bat via the load z l . in this situation the load is driven by a current th rough the intrinsic body diode of the BTS3125TF. during reverse battery all protection functions like current li mitation, over temperature shut down and over voltage clamping are not available. l l clamp out bat l l l clamp out bat clamp out r l i v v i r r v v v ? ? ? ? ? ? ? ? + ? ? ? ? ? ? ? ? ? ? ? = ) ( ) ( ) ( 1 ln e ? ? ? ? ? ? ? ? ? ? = ) ( 2 1 2 1 clamp out bat bat l v v v li e 1 10 100 1000 10000 0,1 1 10 l [mh] i l [a]
datasheet 14 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch power stage the device is dissipating a power loss which is defined by the driven current and the voltage drop on the dmos reverse body diode ?- v out ?. 5.5 inverse current capability an inverse current situation means the out pin is pulle d below gnd potential by cu rrent flowing from gnd to out (for example in half-bridge conf iguration and inductive load using freewheeling via the low side path). in this situation the load is driven by a current thro ugh the intrinsic body diode (device off) of the BTS3125TF. during inverse operation a ll protection functions like current limi tation, over temperature shut-down and over voltage clamping are not available. the device is dissipating a power loss which is defined by the driven current and the voltage drop on the dmos reverse body diode ?- v out ?. input current behavior during inverse condition on output please note that during inverse current on drain an incr eased input current can flow. to limit this current it is needed to place a resistor ( r in ) in line with the input, also to preven t the microcontroller i/o pins from latching up in this case. the value of this resistor is a comp romise of input voltage level in normal operation and maximum allowed device input current i in or i/o current (for example of microcontroller). (5.3) with i in(max) = 2 ma (see also ?absolute maximum ratings? on page 6 ) allow for the device; v ohc(max) maximum high level volt age of the control signal (microcontroller i/o) 5.6 characteristics please see ?power stage? on page 11 for electrical characteristic table. (max) (max) (min) in ohuc in i v r =
datasheet 15 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch protection functions 6 protection functions the device provides embedded protecti on functions. integrated protection functions are designed to prevent ic destruction under fault conditions described in the datasheet. fault cond itions are considered as ?outside? normal operation. protection functions are not designed for continuous repetitive operation. 6.1 over voltage clamping on output the BTS3125TF is equipped with a volt age clamp circuitry that keeps the drain-source (out to gnd) voltage v ds at a certain level v out(clamp) . the over voltage clamping is overruling the other protection functions. power dissipation has to be limited to not exceed the maximum allowed junction temperature. this function is also us ed in terms of inductive clamping. please see also chapter 5.3.1 for more details. 6.2 thermal protection the device is protected against over temperature due to overload and / or bad co oling conditions. to ensure this a temperature sensor is located in the power mosfet. the BTS3125TF has a thermal protection function with automatic restart. af ter the device has switched off due to over temperature the device will stay off until the junction temperature has dropped down below the thermal hysteresis ?thermal protection? on page 15 . figure 14 thermal protective switch off scenario with thermal restart 6.3 short circuit protection / current limitation the condition short circuit is an over load condition to the device. if th e load current reaches the limitation value of i l(lim) the device limits the current and starts heating up. when the thermal shutdown temperature is reached, the device turns off. the time from the beginning of curr ent limitation until the over temper ature switch off depends strongly on the cooling conditions. if input is still high, the device will turn on agai n after the measured temperature has dropped below the thermal hysteresis. figure 15 shows this simplified behavior. in 0v 5v t thermal shutdown t t j t j(sd ) t j(sd)_hys t hermal _ f ault _ rest art . emf v out v bat t thermal restart
datasheet 16 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch protection functions figure 15 short circuit protection via current limitation and over temperature switch off with auto- restart 6.4 characteristics please see ?protection functions? on page 15 for electrical characteristic table. in 0 5v t t j t j(sd) short_circuit_restart.emf turn off du e t o o ver te mp erat ure i d i l(lim ) restart into short circuit after cooling down restart into normal load condition v bat /z sc t j_hy s t t occu rren ce of o ver curren t or h igh oh mic s hor t cir cuit
datasheet 17 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch input stage 7 input stage 7.1 input circuit figure 16 shows the input circuit of the bt s3125tf. in case of open or floa ting input pin, the device will automatically switch off and remain off. an esd zener structure protects the inpu t circuit against esd pulses. figure 16 simplified input circuitry 7.2 characteristics please see ?input stage? on page 21 for electrical ch aracteristic table. in gnd esd protection circuit input cir cuit.emf
datasheet 18 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch electrical characteristics 8 electrical characteristics 8.1 power stage please see chapter ?power stage? on page 11 for parameter description and further details. table 5 electrical characteristics: power stage t j = -40c to +150c, v bat = 6 v to 18 v, all voltages with respect to ground, positive curr ent flowing into pin (unless otherwise specified) parameter symbol values unit note or test condition number min. typ. max. power stage on-state resistance at hot temperature (150c) r ds(on)_150 ? 208 250 m ? t j = 150c; v in = 5 v; i l = i l(nom) p_8.1.4 on-state resistance at ambient temperature (25c) r ds(on)_25 ? 108 ? m ? t j = 25c; v in = 5 v; i l = i l(nom) p_8.1.8 nominal load current i l(nom) ?2? a 1) t j < 150c; t a = 85c v in = 5 v p_8.1.28 off state load current, output leakage current i l(off)_85 ??0.6a 2) v bat = 13.5 v; v in = 0 v; t j 85c p_8.1.32 off state load current, output leakage current i l(off)_150 ?0.51.1a v bat = 18 v; v in = 0 v; t j = 150c p_8.1.36 reverse body diode forward voltage -v out ?0.81.1v i l = -i l(nom) ; v in = 0 v p_8.1.45
datasheet 19 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch electrical characteristics 8.2 protection please see chapter ?protection functions? on page 15 for parameter description and further details. note: integrated protection function s are designed to prevent ic destruction under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. protection functions are not designed for continuous repetitive operation dynamic characteristics - sw itching times single pulse v bat = 13.5 v, r l = 10 ? ; for definition details see figure 10 ?definition of power output timing for resistive load? on page 11 turn-on time t on 35 75 115 s 3) v in = 0 v to 5 v; v out = 10% v bat p_8.1.46 turn-off time t off 70 135 210 s 4) v in = 5 v to 0 v; v out = 90% v bat p_8.1.47 turn-on delay time t don 51525s v in = 0 v to 5 v; v out = 90% v bat p_8.1.48 turn-off delay time t doff 40 75 120 s v in = 5 v to 0 v; v out = 10% v bat p_8.1.49 fall time, falling output voltage (turn- on) t f 30 60 90 s v in = 0 v to 5 v; v out = 90% v bat to v out = 10% v bat p_8.1.50 rise time, rising output voltage t r 30 60 90 s v in = 5 v to 0 v; v out = 10% v bat to v out = 90% v bat p_8.1.51 turn-on slew rate -( v/ t) on 0.22 0.45 0.65 v/s 5) v out = 90% v bat to v out = 50% v bat p_8.1.52 turn-off slew rate ( v/ t) off 0.22 0.45 0.65 v/s 6) v out = 50% v bat to v out = 90% v bat p_8.1.53 1) not subject to production test, calculated by r thja (jedec 2s2p, pcb) and r ds(on) 2) not subject to production test, specified by design; 3) not subject to production test, calcul ated with delay time on and fall time 4) not subject to production test, calculated with delay time off and rise time 5) not subject to production test, calculated slew rate between 90% and 50% v out ; 6) not subject to production test, calculated slew rate between 50% and 90% v out ; table 5 electrical characteristics: power stage (cont?d) t j = -40c to +150c, v bat = 6 v to 18 v, all voltages with respect to ground, positive curr ent flowing into pin (unless otherwise specified) parameter symbol values unit note or test condition number min. typ. max.
datasheet 20 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch electrical characteristics table 6 electrical characteristics: protection t j = -40c to +150c, v bat = 6 v to 18 v, all voltages with respect to ground, positive curr ent flowing into pin (unless otherwise specified) parameter symbol values unit note or test condition number min. typ. max. thermal protection thermal shut down junction temperature t j(sd) 150 175 ? c 1) 3v < v in < 5.5 v 1) not subject to production test, specified by design. p_8.2.1 thermal hysteresis t j_hys ?15? k 1) p_8.2.3 overvoltage protection drain clamp voltage v out(clamp) 40 45 ? v v in = 0 v; i d = 4 ma p_8.2.12 current limitation (see also figure 15 ) current limitation i l(lim) 7 10.5 14 a v in = 5 v; p_8.2.16
datasheet 21 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch electrical characteristics 8.3 input stage please see chapter ?input stage? on page 17 for description and further details. table 7 electrical characteristics: input t j = -40c to +150c, v bat = 6 v to 18 v, all voltages with respect to ground, positi ve current flowing into pin (unless otherwise specified) parameter symbol values unit note or test condition number min. typ. max. input input current, normal on state i in(on) ? 82 110 a v in = 5.0 v p_8.3.1 input current, protection mode i in(prot) ? 124 180 a v in = 5.0 v; p_8.3.6 input current, inverse condition on out to gnd i in(-vout) ? 15 ? ma 1) 2) v out < -0.3 v; -0.3 v v in <5.5 v 1) not subject to production test, specified by design. 2) input current must not exceed the ma ximum ratings in chapter 4, p_4.1.10 p_8.3.7 input pull down current i in-gnd 10 ? ? a 3) v in = v in(th) 3) not subject to production test, specified by design. p_8.3.8 input voltage on-threshold v in(th) 0.8 2.3 3 v i l =0.4 ma; power dmos active p_8.3.9
datasheet 22 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results 9 characterization results typical performance characteristics. 9.1 power stage figure 17 typical r ds(on) vs. v in @ t j = -40 ... 150c, i l = i l(nom) 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 3 3.5 4 4.5 5 5.5 r ds(on) [ ] v in [v] 150c 85c 25c -40c
datasheet 23 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results figure 18 typical r ds(on) vs. t j @ v in = 3 ... 5.5 v, i l = i l(nom) figure 19 typical reverse diode |v out | vs. t j @ i l = i l(nom) 0 0.05 0.1 0.15 0.2 0.25 0.3 -40 25 85 150 r ds(on) [] t j [c] 3v 3.5v 4v 5v 5.5v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -40 0 85 150 |v out | [v] t j [c]
datasheet 24 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results figure 20 typical i l(off) vs. v ds @ t j = -40 ... 150c, v in =0v figure 21 typical i l(off) vs. v in @ t j = -40 ... 150c, v bat = 6 ... 18 v 0.0e+00 5.0e-07 1.0e-06 1.5e-06 2.0e-06 2.5e-06 3.0e-06 3.5e-06 0 5 10 15 20 25 30 i l(off) [a] v ds [v] 150c 85c 25c -40c 0.0e+00 5.0e-07 1.0e-06 1.5e-06 2.0e-06 2.5e-06 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 i l(off) [a] v in [v] 6v - 150c 6v - 85c 6v - 25c 6v - -40c 13.5v - 150c 13.5v - 85c 13.5v - 25c 13.5v - -40c 18v - 150c 18v - 85c 18v - 25c 18v - -40c
datasheet 25 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results figure 22 typical destruction point. e as vs. i l @ t j =25and150c, v bat =13.5v figure 23 typical e ar vs. i l @ t j =25and 105c, v bat =13.5v 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 0.5 1 2 4 e as [mj] i l [a] 25 150 0 5 10 15 20 25 30 35 40 45 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 e ar [mj] i l [a] 10k cycles - 25c 100k cycles- 25c 10k cycles - 105c 100k cycles - 105c
datasheet 26 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results figure 24 typical e ar vs. cycles @ t j =25and105c, v bat =13.5v dynamic charactersitic s (switching times): figure 25 typical t f , t r vs. v in @ t j = -40 ... 150c 0 5 10 15 20 25 30 35 40 45 1.0e+0 10.0e+0 100.0e+0 1.0e+3 1 0.0e+3 100.0e+3 1.0e+6 10.0e+6 e ar [mj] cycles 2a - 25c 4a - 25c 2a - 105c 4a - 105c 0 50 100 150 200 250 3 3.5 4 4.5 5 5.5 t f , t r [us] v in [v] -40c - fall time 25c - fall time 150c - fall time -40c - rise time 25c - rise time 150c - rise time
datasheet 27 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results figure 26 typical t don , t doff vs. v in @ t j = -40 ... 150c figure 27 typical -( v / t ) on , ( v / t ) off vs. v in @ t j = -40 ... 150c 0 10 20 30 40 50 60 70 80 90 3 3.5 4 4.5 5 5.5 t don , t doff [us] v in [v] -40c - delay off time 25c - delay off time 150c - delay off time -40c - delay on time 25c - delay on time 150c - delay on time 0 0.1 0.2 0.3 0.4 0.5 0.6 3 3.5 4 4.5 5 5.5 -(v/t) on , (v/t) off [v/us] v in [v] 150c - slew rate on 25c - slew rate on -40c - slew rate on -40c - slew rate off 25c - slew rate off 150c - slew rate off
datasheet 28 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results figure 28 typical t f , t r vs. v bat @ v in =5v; t j = -40 ... 150c figure 29 typical t don , t doff vs. v bat @ v in =5v; t j = -40 ... 150c 0 10 20 30 40 50 60 70 80 90 6 1116212631 t f , t r [us] v bat [v] -40c - fall time 25c - fall time 150c - fall time -40c - rise time 25c - rise time 150c - rise time 0 20 40 60 80 100 120 6 1116212631 t don , t doff [us] v bat [v] -40c - delay off time 25c - delay off time 150c - delay off time -40c - delay on time 25c - delay on time 150c - delay on time
datasheet 29 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results figure 30 typical -( v / t ) on , ( v / t ) off vs. v bat @ v in =5v; t j = -40 ... 150c figure 31 typical t f , t r vs. i l @ v in =5v; t j = -40 ... 150c 0 0.2 0.4 0.6 0.8 1 1.2 6 1116212631 (v/t) on , (v/t) off [v/us] v bat [v] 150c - slew rate on 25c - slew rate on -40c - slew rate on -40c - slew rate off 25c - slew rate off 150c - slew rate off 0 10 20 30 40 50 60 70 80 0 0.5 1 1.5 2 2.5 3 t f , t r [us] i l [a] -40c - fall time 25c - fall time 150c - fall time -40c - rise time 25c - rise time 150c - rise time
datasheet 30 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results figure 32 typical t don , t doff vs. i l @ v in =5v; t j = -40 ... 150c figure 33 typical -( v / t ) on , ( v / t ) off vs. i l @ v in =5v; t j = -40 ... 150c 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 t don , t doff [us] i l [a] -40c - delay off time 25c - delay off time 150c - delay off time -40c - delay on time 25c - delay on time 150c - delay on time 0 0.1 0.2 0.3 0.4 0.5 0.6 0 0.5 1 1.5 2 2.5 3 -(v/t) on , (v/t) off [v/us] i l [a] 150c - slew rate off 25c - slew rate off -40c - slew rate off -40c - slew rate on 25c - slew rate on 150c - slew rate on
datasheet 31 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results figure 34 typical t f , t r vs. t j @ v in =5v figure 35 typical t don , t doff vs. t j @ v in =5v 0 10 20 30 40 50 60 70 -40 25 85 150 5 - rise time 5 - fall time t j [c] t f , t r [us] 0 10 20 30 40 50 60 70 80 90 -40 25 85 150 5 - delay off time 5 - delay on time t j [c] t don , t doff [us]
datasheet 32 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results figure 36 typical -( v / t ) on , ( v / t ) off vs. t j @ v in =5v 0 0.1 0.2 0.3 0.4 0.5 0.6 -40 25 85 150 5 - slew rate on 5 - slew rate off t j [c] -(v/t) on , (v/t) off [v/us]
datasheet 33 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results 9.2 protection figure 37 typical v out(clamp) vs. t j @ i l =4ma figure 38 typical i l(lim) vs. v bat @ t j = -40 ... 150c, v in =3 v and 5v 40 41 42 43 44 45 46 47 48 49 50 -40 25 85 150 v out(clamp) [v] t j [c] 0 2 4 6 8 10 12 6 1116212631 i l(lim) [a] v bat [v] 5v - -40c 5v - 25c 5v - 85c 5v - 150c 3v - -40c 3v - 25c 3v - 85c 3v - 150c
datasheet 34 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results 9.3 input stage figure 39 typical v in(th) vs. t j @ i l =0.4ma figure 40 typical i in(on) vs. v in @ t j = -40 ... 150c, i l = i l(nom) 0 0.5 1 1.5 2 2.5 3 -40 25 85 150 v in(th) [v] t j [c] vth_rising vth_falling 0.0e+00 2.0e-05 4.0e-05 6.0e-05 8.0e-05 1.0e-04 1.2e-04 1.4e-04 1.6e-04 3 3.5 4 4.5 5 5.5 i in(on) [a] v in [v] 150c 85c 25c -40c
datasheet 35 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch characterization results figure 41 typical i in(prot) vs. v in @ t j = -40 ... 150c, i l = i l(nom) 0.0e+00 2.0e-05 4.0e-05 6.0e-05 8.0e-05 1.0e-04 1.2e-04 1.4e-04 1.6e-04 3 3.5 4 4.5 5 5.5 i in(prot) [a] v in [v] 150c 85c 25c -40c
datasheet 36 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch application information 10 application information note: the following information is given as a hint for the implementation of the device only and shall not be regarded as a description or wa rranty of a certain func tionality, condition or quality of the device. 10.1 application diagram an application example with the BTS3125TF is shown below. figure 42 application example circuitry recommended values: r in =3.3k ? ( v in =5v) note: this is a very simplified example of an applicatio n circuit. the function must be verified in the real application. v bat application_ dpak3 .emf r in voltage regulator in out load i/o pwm micro controller gnd vdd out gnd in bts3xxxtf
datasheet 37 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch package outlines 11 package outlines figure 43 pg-to252-3-313 (outline package) green product (rohs compliant) to meet the world-wide customer requirements for en vironmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant (i.e pb-free finish on leads and suitable for pb -free soldering according to ipc/jedec j-std-020). -0.05 6.5 +0.15 a 0.5 9.98 6.22 -0.2 1 0.1 3.7 0.15 0.8 0.15 max. 0.1 per side 3 x 0.75 2.28 4.57 +0.08 -0.04 0.5 2.3 -0.10 +0.05 b 1.3 +0.08 -0.04 0.5 0...0.15 b a 0.25 m 0.1 (4.24) 0.4 -0.01 +0.20 0.9 b pg-to252-3-313-po v02 1) +0.2 mm mold flash. all metal surfaces tin plated, except area of cut. 0.1 5.4 (5) 0.5 1) for further info rmation on alternative pa ckages, please visit our website: http://www.infineon.com/packages . dimensions in mm
datasheet 38 rev. 1.0 2016-06-01 hitfet - BTS3125TF smart low-side power switch revision history 12 revision history revision date changes rev. 1.0 2016-06-01 datasheet released
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